Sure, but not much of that battery improvement is coming from migrating the APU’s process node. Moving from TSMC’s 7nm process to their 6nm process is only an incremental improvement; a “half-node” shrink rather than a full-node shrink like going from their 7nm to their 5nm.
The biggest battery improvement is (almost definitely) from having a 25% larger battery (40Whr -> 50Whr), with the APU and screen changes providing individually-smaller battery life improvements than that. Hence the APU change improving efficiency “a little”.
Sure, but not much of that battery improvement is coming from migrating the APU’s process node. Moving from TSMC’s 7nm process to their 6nm process is only an incremental improvement; a “half-node” shrink rather than a full-node shrink like going from their 7nm to their 5nm.
The biggest battery improvement is (almost definitely) from having a 25% larger battery (40Whr -> 50Whr), with the APU and screen changes providing individually-smaller battery life improvements than that. Hence the APU change improving efficiency “a little”.